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107 lines
5.4 KiB
107 lines
5.4 KiB
/* |
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* sx127x.c |
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* |
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* Created on: Mar 4, 2023 |
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* Author: Daniel Peter Chokola |
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*/ |
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/* Includes */ |
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#include "sx127x.h" |
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#include "spi.h" |
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#include "util.h" |
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/* Definitions */ |
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#define SX127X_REG_FIFO (0x00) /* Default: 0x00 */ |
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#define SX127X_REG_OPMODE (0x01) /* Default: 0x01 */ |
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#define SX127X_REG_BITRATEMSB (0x02) /* Default: 0x1A */ |
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#define SX127X_REG_BITRATELSB (0x03) /* Default: 0x0B */ |
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#define SX127X_REG_FDEVMSB (0x04) /* Default: 0x00 */ |
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#define SX127X_REG_FDEVLSB (0x05) /* Default: 0x52 */ |
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#define SX127X_REG_FRFMSB (0x06) /* Default: 0x6C */ |
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#define SX127X_REG_FRFMID (0x07) /* Default: 0x80 */ |
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#define SX127X_REG_FRFLSB (0x08) /* Default: 0x00 */ |
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#define SX127X_REG_PACONFIG (0x09) /* Default: 0x4F */ |
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#define SX127X_REG_PARAMP (0x0A) /* Default: 0x09 */ |
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#define SX127X_REG_OCP (0x0B) /* Default: 0x2B */ |
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#define SX127X_REG_LNA (0x0C) /* Default: 0x20 */ |
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#define SX127X_REG_RXCONFIG (0x0D) /* Default: 0x08 (POR), 0x0E (FSK) */ |
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#define SX127X_REG_RSSICONFIG (0x0E) /* Default: 0x02 */ |
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#define SX127X_REG_RSSICOLLISION (0x0F) /* Default: 0x0A */ |
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#define SX127X_REG_RSSITHRESH (0x10) /* Default: 0xFF */ |
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#define SX127X_REG_RSSIVALUE (0x11) /* Default: n/a */ |
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#define SX127X_REG_RXBW (0x12) /* Default: 0x15 */ |
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#define SX127X_REG_AFCBW (0x13) /* Default: 0x0B */ |
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#define SX127X_REG_OOKPEAK (0x14) /* Default: 0x28 */ |
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#define SX127X_REG_OOKFIX (0x15) /* Default: 0x0C */ |
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#define SX127X_REG_OOKAVG (0x16) /* Default: 0x12 */ |
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#define SX127X_REG_ERVED17 (0x17) /* Default: 0x47 */ |
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#define SX127X_REG_ERVED18 (0x18) /* Default: 0x32 */ |
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#define SX127X_REG_ERVED19 (0x19) /* Default: 0x3E */ |
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#define SX127X_REG_AFCFEI (0x1A) /* Default: 0x00 */ |
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#define SX127X_REG_AFCMSB (0x1B) /* Default: 0x00 (POR), n/a (FSK) */ |
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#define SX127X_REG_AFCLSB (0x1C) /* Default: 0x00 (POR), n/a (FSK) */ |
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#define SX127X_REG_FEIMSB (0x1D) /* Default: 0x00 (POR), n/a (FSK) */ |
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#define SX127X_REG_FEILSB (0x1E) /* Default: 0x00 (POR), n/a (FSK) */ |
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#define SX127X_REG_PREAMBLEDETECT (0x1F) /* Default: 0x40 (POR), 0xAA (FSK) */ |
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#define SX127X_REG_RXTIMEOUT1 (0x20) /* Default: 0x00 */ |
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#define SX127X_REG_RXTIMEOUT2 (0x21) /* Default: 0x00 */ |
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#define SX127X_REG_RXTIMEOUT3 (0x22) /* Default: 0x00 */ |
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#define SX127X_REG_RXDELAY (0x23) /* Default: 0x00 */ |
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#define SX127X_REG_OSC (0x24) /* Default: 0x05 (POR), 0x07 (FSK) */ |
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#define SX127X_REG_PREAMBLEMSB (0x25) /* Default: 0x00 */ |
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#define SX127X_REG_PREAMBLELSB (0x26) /* Default: 0x03 */ |
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#define SX127X_REG_SYNCCONFIG (0x27) /* Default: 0x93 */ |
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#define SX127X_REG_SYNCVALUE1 (0x28) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_SYNCVALUE2 (0x29) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_SYNCVALUE3 (0x2A) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_SYNCVALUE4 (0x2B) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_SYNCVALUE5 (0x2C) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_SYNCVALUE6 (0x2D) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_SYNCVALUE7 (0x2E) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_SYNCVALUE8 (0x2F) /* Default: 0x55 (POR), 0x01 (FSK) */ |
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#define SX127X_REG_PACKETCONFIG1 (0x30) /* Default: 0x90 */ |
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#define SX127X_REG_PACKETCONFIG2 (0x31) /* Default: 0x40 */ |
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#define SX127X_REG_PAYLOADLENGTH (0x32) /* Default: 0x40 */ |
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#define SX127X_REG_NODEADRS (0x33) /* Default: 0x00 */ |
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#define SX127X_REG_BROADCASTADRS (0x34) /* Default: 0x00 */ |
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#define SX127X_REG_FIFOTHRESH (0x35) /* Default: 0x1F */ |
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#define SX127X_REG_SEQCONFIG1 (0x36) /* Default: 0x00 */ |
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#define SX127X_REG_SEQCONFIG2 (0x37) /* Default: 0x00 */ |
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#define SX127X_REG_TIMERRESOL (0x38) /* Default: 0x00 */ |
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#define SX127X_REG_TIMER1COEF (0x39) /* Default: 0xF5 (POR), 0x12 (FSK) */ |
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#define SX127X_REG_TIMER2COEF (0x3A) /* Default: 0x20 */ |
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#define SX127X_REG_IMAGECAL (0x3B) /* Default: 0x82 (POR), 0x02 (FSK) */ |
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#define SX127X_REG_TEMP (0x3C) /* Default: - */ |
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#define SX127X_REG_LOWBAT (0x3D) /* Default: 0x02 */ |
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#define SX127X_REG_IRQFLAGS1 (0x3E) /* Default: 0x80 */ |
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#define SX127X_REG_IRQFLAGS2 (0x3F) /* Default: 0x40 */ |
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#define SX127X_REG_DIOMAPPING1 (0x40) /* Default: 0x00 */ |
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#define SX127X_REG_DIOMAPPING2 (0x41) /* Default: 0x00 */ |
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#define SX127X_REG_VERSION (0x42) /* Default: 0x12 */ |
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#define SX127X_REG_PLLHOP (0x44) /* Default: 0x2D */ |
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#define SX127X_REG_TCXO (0x4B) /* Default: 0x09 */ |
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#define SX127X_REG_PADAC (0x4D) /* Default: 0x84 */ |
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#define SX127X_REG_FORMERTEMP (0x5B) /* Default: - */ |
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#define SX127X_REG_BITRATEFRAC (0x5D) /* Default: 0x00 */ |
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#define SX127X_REG_AGCREF (0x61) /* Default: 0x13 */ |
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#define SX127X_REG_AGCTHRESH1 (0x62) /* Default: 0x0E */ |
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#define SX127X_REG_AGCTHRESH2 (0x63) /* Default: 0x5B */ |
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#define SX127X_REG_AGCTHRESH3 (0x64) /* Default: 0xDB */ |
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#define SX127X_REG_PLL (0x70) /* Default: 0xD0 */ |
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/* Private Variables */ |
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/* Function Prototypes */ |
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/* Function Definitions */ |
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int32_t sx127x_init(sx127x_t *sx127x, SPI_HandleTypeDef *hspi, GPIO_TypeDef *port, uint16_t pin) |
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{ |
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return_val_if_fail(sx127x, -1); |
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return_val_if_fail(hspi, -1); |
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sx127x->hspi = hspi; |
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sx127x->port = port; |
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sx127x->pin = pin; |
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return 0; |
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}
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