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1010 lines
37 KiB
1010 lines
37 KiB
/** |
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****************************************************************************** |
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* @file stm32f1xx_hal_pcd.h |
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* @author MCD Application Team |
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* @brief Header file of PCD HAL module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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* All rights reserved.</center></h2> |
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* |
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* This software component is licensed by ST under BSD 3-Clause license, |
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* the "License"; You may not use this file except in compliance with the |
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* License. You may obtain a copy of the License at: |
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* opensource.org/licenses/BSD-3-Clause |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef STM32F1xx_HAL_PCD_H |
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#define STM32F1xx_HAL_PCD_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32f1xx_ll_usb.h" |
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#if defined (USB) || defined (USB_OTG_FS) |
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/** @addtogroup STM32F1xx_HAL_Driver |
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* @{ |
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*/ |
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/** @addtogroup PCD |
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* @{ |
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*/ |
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/* Exported types ------------------------------------------------------------*/ |
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/** @defgroup PCD_Exported_Types PCD Exported Types |
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* @{ |
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*/ |
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/** |
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* @brief PCD State structure definition |
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*/ |
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typedef enum |
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{ |
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HAL_PCD_STATE_RESET = 0x00, |
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HAL_PCD_STATE_READY = 0x01, |
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HAL_PCD_STATE_ERROR = 0x02, |
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HAL_PCD_STATE_BUSY = 0x03, |
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HAL_PCD_STATE_TIMEOUT = 0x04 |
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} PCD_StateTypeDef; |
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/* Device LPM suspend state */ |
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typedef enum |
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{ |
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LPM_L0 = 0x00, /* on */ |
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LPM_L1 = 0x01, /* LPM L1 sleep */ |
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LPM_L2 = 0x02, /* suspend */ |
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LPM_L3 = 0x03, /* off */ |
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} PCD_LPM_StateTypeDef; |
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typedef enum |
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{ |
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PCD_LPM_L0_ACTIVE = 0x00, /* on */ |
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PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ |
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} PCD_LPM_MsgTypeDef; |
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typedef enum |
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{ |
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PCD_BCD_ERROR = 0xFF, |
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PCD_BCD_CONTACT_DETECTION = 0xFE, |
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PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, |
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PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, |
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PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, |
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PCD_BCD_DISCOVERY_COMPLETED = 0x00, |
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} PCD_BCD_MsgTypeDef; |
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#if defined (USB) |
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#endif /* defined (USB) */ |
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#if defined (USB_OTG_FS) |
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typedef USB_OTG_GlobalTypeDef PCD_TypeDef; |
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typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; |
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typedef USB_OTG_EPTypeDef PCD_EPTypeDef; |
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#endif /* defined (USB_OTG_FS) */ |
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#if defined (USB) |
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typedef USB_TypeDef PCD_TypeDef; |
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typedef USB_CfgTypeDef PCD_InitTypeDef; |
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typedef USB_EPTypeDef PCD_EPTypeDef; |
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#endif /* defined (USB) */ |
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/** |
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* @brief PCD Handle Structure definition |
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*/ |
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#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
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typedef struct __PCD_HandleTypeDef |
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#else |
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typedef struct |
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#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
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{ |
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PCD_TypeDef *Instance; /*!< Register base address */ |
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PCD_InitTypeDef Init; /*!< PCD required parameters */ |
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__IO uint8_t USB_Address; /*!< USB Address */ |
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#if defined (USB_OTG_FS) |
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PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ |
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PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ |
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#endif /* defined (USB_OTG_FS) */ |
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#if defined (USB) |
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PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
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PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ |
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#endif /* defined (USB) */ |
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HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
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__IO PCD_StateTypeDef State; /*!< PCD communication state */ |
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__IO uint32_t ErrorCode; /*!< PCD Error code */ |
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uint32_t Setup[12]; /*!< Setup packet buffer */ |
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PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ |
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uint32_t BESL; |
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void *pData; /*!< Pointer to upper stack Handler */ |
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#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
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void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ |
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void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ |
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void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ |
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void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ |
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void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ |
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void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ |
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void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ |
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void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ |
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void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ |
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void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ |
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void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ |
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void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ |
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void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ |
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#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
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} PCD_HandleTypeDef; |
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/** |
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* @} |
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*/ |
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/* Include PCD HAL Extended module */ |
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#include "stm32f1xx_hal_pcd_ex.h" |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup PCD_Exported_Constants PCD Exported Constants |
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* @{ |
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*/ |
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/** @defgroup PCD_Speed PCD Speed |
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* @{ |
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*/ |
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#define PCD_SPEED_FULL USBD_FS_SPEED |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_PHY_Module PCD PHY Module |
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* @{ |
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*/ |
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#define PCD_PHY_ULPI 1U |
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#define PCD_PHY_EMBEDDED 2U |
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#define PCD_PHY_UTMI 3U |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_Error_Code_definition PCD Error Code definition |
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* @brief PCD Error Code definition |
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* @{ |
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*/ |
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#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
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#define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ |
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#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Exported macros -----------------------------------------------------------*/ |
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/** @defgroup PCD_Exported_Macros PCD Exported Macros |
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* @brief macros to handle interrupts and specific clock configurations |
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* @{ |
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*/ |
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#if defined (USB_OTG_FS) |
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#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
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#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) |
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#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) |
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#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ |
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~(USB_OTG_PCGCCTL_STOPCLK) |
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#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK |
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#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
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do { \ |
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EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
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} while(0U) |
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#endif /* defined (USB_OTG_FS) */ |
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#if defined (USB) |
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#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
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#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) |
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#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
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#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE |
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#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
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do { \ |
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EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
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} while(0U) |
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#endif /* defined (USB) */ |
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/** |
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* @} |
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*/ |
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/* Exported functions --------------------------------------------------------*/ |
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/** @addtogroup PCD_Exported_Functions PCD Exported Functions |
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* @{ |
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*/ |
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/* Initialization/de-initialization functions ********************************/ |
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/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions |
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* @{ |
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*/ |
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HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
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#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
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/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition |
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* @brief HAL USB OTG PCD Callback ID enumeration definition |
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* @{ |
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*/ |
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typedef enum |
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{ |
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HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ |
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HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ |
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HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ |
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HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ |
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HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ |
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HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ |
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HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ |
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HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ |
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HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ |
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} HAL_PCD_CallbackIDTypeDef; |
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/** |
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* @} |
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*/ |
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/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition |
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* @brief HAL USB OTG PCD Callback pointer definition |
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* @{ |
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*/ |
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typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ |
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typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ |
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typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ |
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typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ |
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typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ |
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/** |
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* @} |
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*/ |
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HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback); |
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HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID); |
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HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback); |
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HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback); |
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HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback); |
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HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback); |
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HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); |
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#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
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/** |
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* @} |
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*/ |
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/* I/O operation functions ***************************************************/ |
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/* Non-Blocking mode: Interrupt */ |
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/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions |
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* @{ |
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*/ |
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HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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/** |
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* @} |
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*/ |
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/* Peripheral Control functions **********************************************/ |
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/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions |
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* @{ |
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*/ |
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HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
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HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
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HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
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HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
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uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
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/** |
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* @} |
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*/ |
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/* Peripheral State functions ************************************************/ |
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/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions |
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* @{ |
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*/ |
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PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Private constants ---------------------------------------------------------*/ |
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/** @defgroup PCD_Private_Constants PCD Private Constants |
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* @{ |
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*/ |
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/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
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* @{ |
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*/ |
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#if defined (USB_OTG_FS) |
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#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U |
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#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU |
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#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U |
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#define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ |
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#endif /* defined (USB_OTG_FS) */ |
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#if defined (USB) |
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#define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ |
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#endif /* defined (USB) */ |
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/** |
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* @} |
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*/ |
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#if defined (USB) |
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/** @defgroup PCD_EP0_MPS PCD EP0 MPS |
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* @{ |
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*/ |
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#define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
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#define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
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#define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
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#define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_ENDP PCD ENDP |
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* @{ |
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*/ |
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#define PCD_ENDP0 0U |
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#define PCD_ENDP1 1U |
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#define PCD_ENDP2 2U |
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#define PCD_ENDP3 3U |
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#define PCD_ENDP4 4U |
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#define PCD_ENDP5 5U |
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#define PCD_ENDP6 6U |
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#define PCD_ENDP7 7U |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind |
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* @{ |
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*/ |
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#define PCD_SNG_BUF 0U |
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#define PCD_DBL_BUF 1U |
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/** |
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* @} |
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*/ |
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#endif /* defined (USB) */ |
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/** |
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* @} |
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*/ |
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#if defined (USB_OTG_FS) |
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#ifndef USB_OTG_DOEPINT_OTEPSPR |
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#define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */ |
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#endif |
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#ifndef USB_OTG_DOEPMSK_OTEPSPRM |
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#define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */ |
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#endif |
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#ifndef USB_OTG_DOEPINT_NAK |
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#define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */ |
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#endif |
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#ifndef USB_OTG_DOEPMSK_NAKM |
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#define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */ |
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#endif |
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#ifndef USB_OTG_DOEPINT_STPKTRX |
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#define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */ |
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#endif |
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#ifndef USB_OTG_DOEPMSK_NYETM |
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#define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */ |
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#endif |
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#endif /* defined (USB_OTG_FS) */ |
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/* Private macros ------------------------------------------------------------*/ |
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/** @defgroup PCD_Private_Macros PCD Private Macros |
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* @{ |
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*/ |
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#if defined (USB) |
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/******************** Bit definition for USB_COUNTn_RX register *************/ |
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#define USB_CNTRX_NBLK_MSK (0x1FU << 10) |
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#define USB_CNTRX_BLSIZE (0x1U << 15) |
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/* SetENDPOINT */ |
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#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) |
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/* GetENDPOINT */ |
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#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) |
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/* ENDPOINT transfer */ |
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#define USB_EP0StartXfer USB_EPStartXfer |
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/** |
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* @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wType Endpoint Type. |
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* @retval None |
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*/ |
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#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
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((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) |
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/** |
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* @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval Endpoint Type |
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*/ |
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#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) |
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/** |
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* @brief free buffer used from the application realizing it to the line |
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* toggles bit SW_BUF in the double buffered endpoint register |
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* @param USBx USB device. |
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* @param bEpNum, bDir |
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* @retval None |
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*/ |
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#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \ |
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if ((bDir) == 0U) \ |
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{ \ |
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/* OUT double buffered endpoint */ \ |
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PCD_TX_DTOG((USBx), (bEpNum)); \ |
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} \ |
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else if ((bDir) == 1U) \ |
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{ \ |
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/* IN double buffered endpoint */ \ |
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PCD_RX_DTOG((USBx), (bEpNum)); \ |
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} \ |
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} while(0) |
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/** |
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* @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wState new state |
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* @retval None |
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*/ |
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#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ |
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/* toggle first bit ? */ \ |
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if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPTX_DTOG1; \ |
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} \ |
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/* toggle second bit ? */ \ |
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if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPTX_DTOG2; \ |
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} \ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
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} while(0) /* PCD_SET_EP_TX_STATUS */ |
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/** |
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* @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wState new state |
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* @retval None |
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*/ |
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#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ |
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/* toggle first bit ? */ \ |
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if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPRX_DTOG1; \ |
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} \ |
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/* toggle second bit ? */ \ |
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if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPRX_DTOG2; \ |
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} \ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
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} while(0) /* PCD_SET_EP_RX_STATUS */ |
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/** |
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* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wStaterx new state. |
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* @param wStatetx new state. |
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* @retval None |
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*/ |
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#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ |
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/* toggle first bit ? */ \ |
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if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPRX_DTOG1; \ |
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} \ |
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/* toggle second bit ? */ \ |
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if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPRX_DTOG2; \ |
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} \ |
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/* toggle first bit ? */ \ |
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if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPTX_DTOG1; \ |
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} \ |
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/* toggle second bit ? */ \ |
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if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ |
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{ \ |
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_wRegVal ^= USB_EPTX_DTOG2; \ |
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} \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
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} while(0) /* PCD_SET_EP_TXRX_STATUS */ |
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/** |
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* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
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* /STAT_RX[1:0]) |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval status |
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*/ |
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#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) |
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#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) |
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/** |
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* @brief sets directly the VALID tx/rx-status into the endpoint register |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
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#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
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/** |
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* @brief checks stall condition in an endpoint. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval TRUE = endpoint in stall condition. |
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*/ |
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#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ |
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== USB_EP_TX_STALL) |
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#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ |
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== USB_EP_RX_STALL) |
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/** |
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* @brief set & clear EP_KIND bit. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_SET_EP_KIND(USBx, bEpNum) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ |
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} while(0) /* PCD_SET_EP_KIND */ |
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#define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
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} while(0) /* PCD_CLEAR_EP_KIND */ |
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/** |
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* @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
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#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
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/** |
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* @brief Sets/clears directly EP_KIND bit in the endpoint register. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
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#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
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/** |
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* @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ |
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} while(0) /* PCD_CLEAR_RX_EP_CTR */ |
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#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ |
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} while(0) /* PCD_CLEAR_TX_EP_CTR */ |
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/** |
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* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_RX_DTOG(USBx, bEpNum) do { \ |
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register uint16_t _wEPVal; \ |
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\ |
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_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ |
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} while(0) /* PCD_RX_DTOG */ |
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#define PCD_TX_DTOG(USBx, bEpNum) do { \ |
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register uint16_t _wEPVal; \ |
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\ |
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_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ |
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} while(0) /* PCD_TX_DTOG */ |
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/** |
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* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
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\ |
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if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ |
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{ \ |
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PCD_RX_DTOG((USBx), (bEpNum)); \ |
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} \ |
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} while(0) /* PCD_CLEAR_RX_DTOG */ |
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#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
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\ |
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if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ |
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{ \ |
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PCD_TX_DTOG((USBx), (bEpNum)); \ |
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} \ |
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} while(0) /* PCD_CLEAR_TX_DTOG */ |
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/** |
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* @brief Sets address in an endpoint register. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param bAddr Address. |
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* @retval None |
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*/ |
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#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \ |
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register uint16_t _wRegVal; \ |
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\ |
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_wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ |
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\ |
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PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
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} while(0) /* PCD_SET_EP_ADDRESS */ |
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/** |
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* @brief Gets address in an endpoint register. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
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#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
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#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
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/** |
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* @brief sets address of the tx/rx buffer. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wAddr address to be set (must be word aligned). |
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* @retval None |
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*/ |
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#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \ |
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register __IO uint16_t *_wRegVal; \ |
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register uint32_t _wRegBase = (uint32_t)USBx; \ |
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\ |
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_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
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_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ |
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*_wRegVal = ((wAddr) >> 1) << 1; \ |
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} while(0) /* PCD_SET_EP_TX_ADDRESS */ |
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#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \ |
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register __IO uint16_t *_wRegVal; \ |
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register uint32_t _wRegBase = (uint32_t)USBx; \ |
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\ |
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_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
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_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ |
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*_wRegVal = ((wAddr) >> 1) << 1; \ |
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} while(0) /* PCD_SET_EP_RX_ADDRESS */ |
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/** |
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* @brief Gets address of the tx/rx buffer. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval address of the buffer. |
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*/ |
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#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
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#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
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/** |
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* @brief Sets counter of rx buffer with no. of blocks. |
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* @param pdwReg Register pointer |
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* @param wCount Counter. |
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* @param wNBlocks no. of Blocks. |
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* @retval None |
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*/ |
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#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \ |
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(wNBlocks) = (wCount) >> 5; \ |
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if (((wCount) & 0x1fU) == 0U) \ |
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{ \ |
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(wNBlocks)--; \ |
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} \ |
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*(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ |
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} while(0) /* PCD_CALC_BLK32 */ |
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#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \ |
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(wNBlocks) = (wCount) >> 1; \ |
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if (((wCount) & 0x1U) != 0U) \ |
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{ \ |
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(wNBlocks)++; \ |
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} \ |
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*(pdwReg) = (uint16_t)((wNBlocks) << 10); \ |
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} while(0) /* PCD_CALC_BLK2 */ |
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#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \ |
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uint32_t wNBlocks; \ |
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if ((wCount) == 0U) \ |
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{ \ |
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*(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ |
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*(pdwReg) |= USB_CNTRX_BLSIZE; \ |
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} \ |
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else if((wCount) <= 62U) \ |
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{ \ |
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PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ |
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} \ |
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else \ |
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{ \ |
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PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ |
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} \ |
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} while(0) /* PCD_SET_EP_CNT_RX_REG */ |
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#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \ |
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register uint32_t _wRegBase = (uint32_t)(USBx); \ |
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register __IO uint16_t *pdwReg; \ |
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\ |
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_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
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pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
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PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ |
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} while(0) |
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/** |
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* @brief sets counter for the tx/rx buffer. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wCount Counter value. |
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* @retval None |
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*/ |
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#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \ |
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register uint32_t _wRegBase = (uint32_t)(USBx); \ |
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register __IO uint16_t *_wRegVal; \ |
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\ |
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_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
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_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
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*_wRegVal = (uint16_t)(wCount); \ |
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} while(0) |
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#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \ |
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register uint32_t _wRegBase = (uint32_t)(USBx); \ |
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register __IO uint16_t *_wRegVal; \ |
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\ |
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_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
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_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
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PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ |
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} while(0) |
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|
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/** |
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* @brief gets counter of the tx buffer. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval Counter value |
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*/ |
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#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) |
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#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) |
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/** |
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* @brief Sets buffer 0/1 address in a double buffer endpoint. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wBuf0Addr buffer 0 address. |
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* @retval Counter value |
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*/ |
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#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \ |
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PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ |
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} while(0) /* PCD_SET_EP_DBUF0_ADDR */ |
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#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \ |
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PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ |
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} while(0) /* PCD_SET_EP_DBUF1_ADDR */ |
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/** |
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* @brief Sets addresses in a double buffer endpoint. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param wBuf0Addr: buffer 0 address. |
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* @param wBuf1Addr = buffer 1 address. |
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* @retval None |
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*/ |
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#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \ |
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PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ |
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PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ |
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} while(0) /* PCD_SET_EP_DBUF_ADDR */ |
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/** |
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* @brief Gets buffer 0/1 address of a double buffer endpoint. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
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#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
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/** |
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* @brief Gets buffer 0/1 address of a double buffer endpoint. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @param bDir endpoint dir EP_DBUF_OUT = OUT |
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* EP_DBUF_IN = IN |
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* @param wCount: Counter value |
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* @retval None |
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*/ |
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#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \ |
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if ((bDir) == 0U) \ |
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/* OUT endpoint */ \ |
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{ \ |
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PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ |
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} \ |
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else \ |
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{ \ |
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if ((bDir) == 1U) \ |
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{ \ |
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/* IN endpoint */ \ |
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PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ |
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} \ |
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} \ |
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} while(0) /* SetEPDblBuf0Count*/ |
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#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \ |
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register uint32_t _wBase = (uint32_t)(USBx); \ |
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__IO uint16_t *_wEPRegVal; \ |
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\ |
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if ((bDir) == 0U) \ |
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{ \ |
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/* OUT endpoint */ \ |
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PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ |
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} \ |
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else \ |
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{ \ |
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if ((bDir) == 1U) \ |
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{ \ |
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/* IN endpoint */ \ |
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_wBase += (uint32_t)(USBx)->BTABLE; \ |
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_wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
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*_wEPRegVal = (uint16_t)(wCount); \ |
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} \ |
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} \ |
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} while(0) /* SetEPDblBuf1Count */ |
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#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \ |
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PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
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PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
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} while(0) /* PCD_SET_EP_DBUF_CNT */ |
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/** |
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* @brief Gets buffer 0/1 rx/tx counter for double buffering. |
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* @param USBx USB peripheral instance register address. |
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* @param bEpNum Endpoint Number. |
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* @retval None |
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*/ |
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#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
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#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
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#endif /* defined (USB) */ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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#endif /* defined (USB) || defined (USB_OTG_FS) */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* STM32F1xx_HAL_PCD_H */ |
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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