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851 lines
34 KiB
851 lines
34 KiB
/** |
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****************************************************************************** |
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* @file stm32f1xx_hal_pcd.h |
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* @author MCD Application Team |
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* @brief Header file of PCD HAL module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32F1xx_HAL_PCD_H |
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#define __STM32F1xx_HAL_PCD_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#if defined(STM32F102x6) || defined(STM32F102xB) || \ |
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defined(STM32F103x6) || defined(STM32F103xB) || \ |
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defined(STM32F103xE) || defined(STM32F103xG) || \ |
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defined(STM32F105xC) || defined(STM32F107xC) |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32f1xx_ll_usb.h" |
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/** @addtogroup STM32F1xx_HAL_Driver |
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* @{ |
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*/ |
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/** @addtogroup PCD |
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* @{ |
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*/ |
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/* Exported types ------------------------------------------------------------*/ |
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/** @defgroup PCD_Exported_Types PCD Exported Types |
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* @{ |
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*/ |
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/** |
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* @brief PCD State structure definition |
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*/ |
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typedef enum |
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{ |
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HAL_PCD_STATE_RESET = 0x00U, |
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HAL_PCD_STATE_READY = 0x01U, |
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HAL_PCD_STATE_ERROR = 0x02U, |
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HAL_PCD_STATE_BUSY = 0x03U, |
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HAL_PCD_STATE_TIMEOUT = 0x04U |
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} PCD_StateTypeDef; |
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#if defined (USB) |
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/** |
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* @brief PCD double buffered endpoint direction |
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*/ |
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typedef enum |
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{ |
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PCD_EP_DBUF_OUT, |
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PCD_EP_DBUF_IN, |
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PCD_EP_DBUF_ERR, |
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}PCD_EP_DBUF_DIR; |
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/** |
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* @brief PCD endpoint buffer number |
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*/ |
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typedef enum |
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{ |
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PCD_EP_NOBUF, |
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PCD_EP_BUF0, |
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PCD_EP_BUF1 |
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}PCD_EP_BUF_NUM; |
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#endif /* USB */ |
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#if defined (USB_OTG_FS) |
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typedef USB_OTG_GlobalTypeDef PCD_TypeDef; |
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typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; |
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typedef USB_OTG_EPTypeDef PCD_EPTypeDef; |
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#endif /* USB_OTG_FS */ |
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#if defined (USB) |
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typedef USB_TypeDef PCD_TypeDef; |
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typedef USB_CfgTypeDef PCD_InitTypeDef; |
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typedef USB_EPTypeDef PCD_EPTypeDef; |
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#endif /* USB */ |
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/** |
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* @brief PCD Handle Structure definition |
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*/ |
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typedef struct |
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{ |
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PCD_TypeDef *Instance; /*!< Register base address */ |
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PCD_InitTypeDef Init; /*!< PCD required parameters */ |
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__IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */ |
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PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ |
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PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ |
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HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
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__IO PCD_StateTypeDef State; /*!< PCD communication state */ |
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uint32_t Setup[12U]; /*!< Setup packet buffer */ |
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void *pData; /*!< Pointer to upper stack Handler */ |
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} PCD_HandleTypeDef; |
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/** |
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* @} |
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*/ |
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/* Include PCD HAL Extension module */ |
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#include "stm32f1xx_hal_pcd_ex.h" |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup PCD_Exported_Constants PCD Exported Constants |
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* @{ |
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*/ |
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/** @defgroup PCD_Speed PCD Speed |
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* @{ |
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*/ |
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#define PCD_SPEED_HIGH 0U /* Not Supported */ |
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#define PCD_SPEED_HIGH_IN_FULL 1U /* Not Supported */ |
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#define PCD_SPEED_FULL 2U |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_PHY_Module PCD PHY Module |
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* @{ |
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*/ |
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#define PCD_PHY_EMBEDDED 2U |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value |
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* @{ |
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*/ |
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#ifndef USBD_FS_TRDT_VALUE |
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#define USBD_FS_TRDT_VALUE 5U |
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#endif /* USBD_FS_TRDT_VALUE */ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Exported macros -----------------------------------------------------------*/ |
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/** @defgroup PCD_Exported_Macros PCD Exported Macros |
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* @brief macros to handle interrupts and specific clock configurations |
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* @{ |
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*/ |
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#if defined (USB_OTG_FS) |
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#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
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#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__)) |
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#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) |
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#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ |
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~(USB_OTG_PCGCCTL_STOPCLK) |
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#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK |
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#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
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do{ \ |
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EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
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} while(0U) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \ |
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do{ \ |
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EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
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} while(0U) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
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do{ \ |
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EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
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EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
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EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
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} while(0U) |
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#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE) |
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#endif /* USB_OTG_FS */ |
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#if defined (USB) |
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#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) |
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#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
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#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) |
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#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
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#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE) |
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#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE |
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#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
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do{ \ |
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EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
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} while(0U) |
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#define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \ |
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do{ \ |
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EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
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} while(0U) |
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#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
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do{ \ |
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EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
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EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
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EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
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EXTI->FTSR |= USB_WAKEUP_EXTI_LINE; \ |
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} while(0U) |
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#endif /* USB */ |
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/** |
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* @} |
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*/ |
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/* Exported functions --------------------------------------------------------*/ |
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/** @addtogroup PCD_Exported_Functions PCD Exported Functions |
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* @{ |
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*/ |
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/* Initialization/de-initialization functions ********************************/ |
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/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions |
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* @{ |
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*/ |
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HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
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/** |
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* @} |
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*/ |
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/* I/O operation functions ***************************************************/ |
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/* Non-Blocking mode: Interrupt */ |
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/** @addtogroup PCD_Exported_Functions_Group2 IO operation functions |
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* @{ |
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*/ |
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HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
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void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
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/** |
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* @} |
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*/ |
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/* Peripheral Control functions **********************************************/ |
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/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions |
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* @{ |
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*/ |
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HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
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HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
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HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
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HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
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uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
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HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
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/** |
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* @} |
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*/ |
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/* Peripheral State functions ************************************************/ |
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/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions |
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* @{ |
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*/ |
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PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Private constants ---------------------------------------------------------*/ |
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/** @defgroup PCD_Private_Constants PCD Private Constants |
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* @{ |
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*/ |
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/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
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* @{ |
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*/ |
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#if defined (USB_OTG_FS) |
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#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U |
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#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU |
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#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U |
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#define USB_OTG_FS_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */ |
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#endif /* USB_OTG_FS */ |
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#if defined (USB) |
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#define USB_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */ |
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#endif /* USB */ |
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/** |
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* @} |
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*/ |
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#if defined (USB) |
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/** @defgroup PCD_EP0_MPS PCD EP0 MPS |
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* @{ |
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*/ |
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#define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
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#define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
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#define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
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#define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_ENDP PCD ENDP |
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* @{ |
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*/ |
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#define PCD_ENDP0 ((uint8_t)0) |
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#define PCD_ENDP1 ((uint8_t)1) |
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#define PCD_ENDP2 ((uint8_t)2) |
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#define PCD_ENDP3 ((uint8_t)3) |
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#define PCD_ENDP4 ((uint8_t)4) |
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#define PCD_ENDP5 ((uint8_t)5) |
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#define PCD_ENDP6 ((uint8_t)6) |
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#define PCD_ENDP7 ((uint8_t)7) |
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/** |
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* @} |
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*/ |
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/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind |
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* @{ |
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*/ |
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#define PCD_SNG_BUF 0U |
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#define PCD_DBL_BUF 1U |
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/** |
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* @} |
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*/ |
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#endif /* USB */ |
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/** |
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* @} |
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*/ |
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/* Private macros ------------------------------------------------------------*/ |
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/** @addtogroup PCD_Private_Macros PCD Private Macros |
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* @{ |
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*/ |
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#if defined (USB) |
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/* SetENDPOINT */ |
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#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2U)= (uint16_t)(wRegValue)) |
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/* GetENDPOINT */ |
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#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2U)) |
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/* ENDPOINT transfer */ |
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#define USB_EP0StartXfer USB_EPStartXfer |
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/** |
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* @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
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* @param USBx: USB peripheral instance register address. |
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* @param bEpNum: Endpoint Number. |
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* @param wType: Endpoint Type. |
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* @retval None |
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*/ |
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#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
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((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) ))) |
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/** |
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* @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
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* @param USBx: USB peripheral instance register address. |
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* @param bEpNum: Endpoint Number. |
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* @retval Endpoint Type |
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*/ |
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#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) |
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/** |
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* @brief free buffer used from the application realizing it to the line |
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toggles bit SW_BUF in the double buffered endpoint register |
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* @param USBx: USB peripheral instance register address. |
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* @param bEpNum: Endpoint Number. |
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* @param bDir: Direction |
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* @retval None |
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*/ |
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#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ |
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{\ |
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if ((bDir) == PCD_EP_DBUF_OUT)\ |
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{ /* OUT double buffered endpoint */\ |
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PCD_TX_DTOG((USBx), (bEpNum));\ |
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}\ |
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else if ((bDir) == PCD_EP_DBUF_IN)\ |
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{ /* IN double buffered endpoint */\ |
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PCD_RX_DTOG((USBx), (bEpNum));\ |
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}\ |
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} |
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/** |
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* @brief gets direction of the double buffered endpoint |
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* @param USBx: USB peripheral instance register address. |
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* @param bEpNum: Endpoint Number. |
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* @retval EP_DBUF_OUT, EP_DBUF_IN, |
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* EP_DBUF_ERR if the endpoint counter not yet programmed. |
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*/ |
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#define PCD_GET_DB_DIR(USBx, bEpNum)\ |
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{\ |
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if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\ |
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return(PCD_EP_DBUF_OUT);\ |
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else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\ |
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return(PCD_EP_DBUF_IN);\ |
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else\ |
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return(PCD_EP_DBUF_ERR);\ |
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} |
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/** |
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* @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
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* @param USBx: USB peripheral instance register address. |
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* @param bEpNum: Endpoint Number. |
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* @param wState: new state |
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* @retval None |
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*/ |
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#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ |
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\ |
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_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\ |
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/* toggle first bit ? */ \ |
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if((USB_EPTX_DTOG1 & (wState))!= 0U)\ |
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{ \ |
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_wRegVal ^= USB_EPTX_DTOG1; \ |
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} \ |
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/* toggle second bit ? */ \ |
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if((USB_EPTX_DTOG2 & (wState))!= 0U) \ |
|
{ \ |
|
_wRegVal ^= USB_EPTX_DTOG2; \ |
|
} \ |
|
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\ |
|
} /* PCD_SET_EP_TX_STATUS */ |
|
|
|
/** |
|
* @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param wState: new state |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ |
|
register uint16_t _wRegVal; \ |
|
\ |
|
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\ |
|
/* toggle first bit ? */ \ |
|
if((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
|
{ \ |
|
_wRegVal ^= USB_EPRX_DTOG1; \ |
|
} \ |
|
/* toggle second bit ? */ \ |
|
if((USB_EPRX_DTOG2 & (wState))!= 0U) \ |
|
{ \ |
|
_wRegVal ^= USB_EPRX_DTOG2; \ |
|
} \ |
|
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ |
|
} /* PCD_SET_EP_RX_STATUS */ |
|
|
|
/** |
|
* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param wStaterx: new state. |
|
* @param wStatetx: new state. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ |
|
register uint32_t _wRegVal; \ |
|
\ |
|
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ |
|
/* toggle first bit ? */ \ |
|
if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \ |
|
{ \ |
|
_wRegVal ^= USB_EPRX_DTOG1; \ |
|
} \ |
|
/* toggle second bit ? */ \ |
|
if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ |
|
{ \ |
|
_wRegVal ^= USB_EPRX_DTOG2; \ |
|
} \ |
|
/* toggle first bit ? */ \ |
|
if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ |
|
{ \ |
|
_wRegVal ^= USB_EPTX_DTOG1; \ |
|
} \ |
|
/* toggle second bit ? */ \ |
|
if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ |
|
{ \ |
|
_wRegVal ^= USB_EPTX_DTOG2; \ |
|
} \ |
|
PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ |
|
} /* PCD_SET_EP_TXRX_STATUS */ |
|
|
|
/** |
|
* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
|
* /STAT_RX[1:0]) |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval status |
|
*/ |
|
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) |
|
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) |
|
|
|
/** |
|
* @brief sets directly the VALID tx/rx-status into the endpoint register |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
|
#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
|
|
|
/** |
|
* @brief checks stall condition in an endpoint. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval TRUE = endpoint in stall condition. |
|
*/ |
|
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ |
|
== USB_EP_TX_STALL) |
|
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ |
|
== USB_EP_RX_STALL) |
|
|
|
/** |
|
* @brief set & clear EP_KIND bit. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
|
(USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK)))) |
|
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
|
(USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK)))) |
|
|
|
/** |
|
* @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
|
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
|
|
|
/** |
|
* @brief Sets/clears directly EP_KIND bit in the endpoint register. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
|
#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
|
|
|
/** |
|
* @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
|
PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK)) |
|
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
|
PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK)) |
|
|
|
/** |
|
* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
|
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
|
#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
|
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
|
|
|
/** |
|
* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0U)\ |
|
{ \ |
|
PCD_RX_DTOG((USBx), (bEpNum)); \ |
|
} |
|
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0U)\ |
|
{ \ |
|
PCD_TX_DTOG((USBx), (bEpNum)); \ |
|
} |
|
|
|
/** |
|
* @brief Sets address in an endpoint register. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param bAddr: Address. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
|
USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr)) |
|
|
|
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
|
|
|
#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
|
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+2U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
|
#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+4U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
|
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+6U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
|
|
|
#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\ |
|
uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \ |
|
PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ |
|
} |
|
|
|
/** |
|
* @brief sets address of the tx/rx buffer. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param wAddr: address to be set (must be word aligned). |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U)) |
|
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U)) |
|
|
|
/** |
|
* @brief Gets address of the tx/rx buffer. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval address of the buffer. |
|
*/ |
|
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
|
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
|
|
|
/** |
|
* @brief Sets counter of rx buffer with no. of blocks. |
|
* @param dwReg: Register |
|
* @param wCount: Counter. |
|
* @param wNBlocks: no. of Blocks. |
|
* @retval None |
|
*/ |
|
#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ |
|
(wNBlocks) = (wCount) >> 5U;\ |
|
if(((wCount) & 0x1FU) == 0U)\ |
|
{ \ |
|
(wNBlocks)--;\ |
|
} \ |
|
*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | 0x8000U); \ |
|
}/* PCD_CALC_BLK32 */ |
|
|
|
#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ |
|
(wNBlocks) = (wCount) >> 1U;\ |
|
if(((wCount) & 0x01U) != 0U)\ |
|
{ \ |
|
(wNBlocks)++;\ |
|
} \ |
|
*pdwReg = (uint16_t)((wNBlocks) << 10U);\ |
|
}/* PCD_CALC_BLK2 */ |
|
|
|
#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ |
|
uint16_t wNBlocks;\ |
|
if((wCount) > 62U) \ |
|
{ \ |
|
PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \ |
|
} \ |
|
else \ |
|
{ \ |
|
PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \ |
|
} \ |
|
}/* PCD_SET_EP_CNT_RX_REG */ |
|
|
|
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ |
|
uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \ |
|
PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ |
|
} |
|
|
|
/** |
|
* @brief sets counter for the tx/rx buffer. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param wCount: Counter value. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) |
|
|
|
|
|
/** |
|
* @brief gets counter of the tx buffer. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval Counter value |
|
*/ |
|
#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3FFU) |
|
#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3FFU) |
|
|
|
/** |
|
* @brief Sets buffer 0/1 address in a double buffer endpoint. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param wBuf0Addr: buffer 0 address. |
|
* @retval Counter value |
|
*/ |
|
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));} |
|
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));} |
|
|
|
/** |
|
* @brief Sets addresses in a double buffer endpoint. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param wBuf0Addr: buffer 0 address. |
|
* @param wBuf1Addr = buffer 1 address. |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ |
|
PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ |
|
PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ |
|
} /* PCD_SET_EP_DBUF_ADDR */ |
|
|
|
/** |
|
* @brief Gets buffer 0/1 address of a double buffer endpoint. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
|
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
|
|
|
/** |
|
* @brief Gets buffer 0/1 address of a double buffer endpoint. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @param bDir: endpoint dir EP_DBUF_OUT = OUT |
|
* EP_DBUF_IN = IN |
|
* @param wCount: Counter value |
|
* @retval None |
|
*/ |
|
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ |
|
if((bDir) == PCD_EP_DBUF_OUT)\ |
|
/* OUT endpoint */ \ |
|
{PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \ |
|
else if((bDir) == PCD_EP_DBUF_IN)\ |
|
/* IN endpoint */ \ |
|
*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
|
} /* SetEPDblBuf0Count*/ |
|
|
|
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ |
|
if((bDir) == PCD_EP_DBUF_OUT)\ |
|
{/* OUT endpoint */ \ |
|
PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \ |
|
} \ |
|
else if((bDir) == PCD_EP_DBUF_IN)\ |
|
{/* IN endpoint */ \ |
|
*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
|
} \ |
|
} /* SetEPDblBuf1Count */ |
|
|
|
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ |
|
PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
|
PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
|
} /* PCD_SET_EP_DBUF_CNT */ |
|
|
|
/** |
|
* @brief Gets buffer 0/1 rx/tx counter for double buffering. |
|
* @param USBx: USB peripheral instance register address. |
|
* @param bEpNum: Endpoint Number. |
|
* @retval None |
|
*/ |
|
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
|
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
|
|
|
#endif /* USB */ |
|
|
|
/** @defgroup PCD_Instance_definition PCD Instance definition |
|
* @{ |
|
*/ |
|
#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE |
|
/** |
|
* @} |
|
*/ |
|
|
|
/** |
|
* @} |
|
*/ |
|
|
|
/** |
|
* @} |
|
*/ |
|
|
|
/** |
|
* @} |
|
*/ |
|
|
|
#endif /* STM32F102x6 || STM32F102xB || */ |
|
/* STM32F103x6 || STM32F103xB || */ |
|
/* STM32F103xE || STM32F103xG || */ |
|
/* STM32F105xC || STM32F107xC */ |
|
|
|
#ifdef __cplusplus |
|
} |
|
#endif |
|
|
|
|
|
#endif /* __STM32F1xx_HAL_PCD_H */ |
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
|