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Mateusz Salamon 7 years ago
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54859cae64
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30c1fb4c31
12 changed files with 1550 additions and 788 deletions
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  1. 296
      .cproject
  2. 2
      .mxproject
  3. 4
      .settings/language.settings.xml
  4. 209
      Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h
  5. 16
      Inc/usb_parsing.h
  6. 115
      Inc/ws2812b_fx.h
  7. 10
      STM32F103C8Tx_FLASH.ld
  8. 73
      Src/main.c
  9. 313
      Src/usb_parsing.c
  10. 16
      Src/usbd_cdc_if.c
  11. 1250
      Src/ws2812b_fx.c
  12. 34
      startup/startup_stm32f103xb.s

296
.cproject
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@ -1,235 +1,245 @@
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2
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@ -5,7 +5,7 @@ SourcePath=D:/GoogleDrive/Blog msalamon.pl/Materialy do wpisow/6. Adresowalne di
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[PreviousLibFiles] [PreviousLibFiles]
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[PreviousUsedSW4STM32Files] [PreviousUsedSW4STM32Files]
SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\dma.c;..\Src\spi.c;..\Src\usb_device.c;..\Src\usbd_conf.c;..\Src\usbd_desc.c;..\Src\usbd_cdc_if.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;../\Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;null;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c; SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\dma.c;..\Src\spi.c;..\Src\usb_device.c;..\Src\usbd_conf.c;..\Src\usbd_desc.c;..\Src\usbd_cdc_if.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;../\Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;null;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;

4
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-661347161213366302" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true"> <provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-1456835434158824359" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/> <language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/> <language-scope id="org.eclipse.cdt.core.g++"/>
</provider> </provider>
@ -16,7 +16,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/> <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-597409475934227034" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true"> <provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-1392897748879685091" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/> <language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/> <language-scope id="org.eclipse.cdt.core.g++"/>
</provider> </provider>

209
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h → Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h
Unescape View File

@ -1,6 +1,6 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f103x6.h * @file stm32f103xb.h
* @author MCD Application Team * @author MCD Application Team
* @version V4.2.0 * @version V4.2.0
* @date 31-March-2017 * @date 31-March-2017
@ -48,12 +48,12 @@
* @{ * @{
*/ */
/** @addtogroup stm32f103x6 /** @addtogroup stm32f103xb
* @{ * @{
*/ */
#ifndef __STM32F103x6_H #ifndef __STM32F103xB_H
#define __STM32F103x6_H #define __STM32F103xB_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -128,11 +128,16 @@ typedef enum
TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */
TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ TIM2_IRQn = 28, /*!< TIM2 global Interrupt */
TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ TIM3_IRQn = 29, /*!< TIM3 global Interrupt */
TIM4_IRQn = 30, /*!< TIM4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */ USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
@ -612,7 +617,7 @@ typedef struct
#define FLASH_BASE 0x08000000U /*!< FLASH base address in the alias region */ #define FLASH_BASE 0x08000000U /*!< FLASH base address in the alias region */
#define FLASH_BANK1_END 0x08007FFFU /*!< FLASH END address of bank1 */ #define FLASH_BANK1_END 0x0801FFFFU /*!< FLASH END address of bank1 */
#define SRAM_BASE 0x20000000U /*!< SRAM base address in the alias region */ #define SRAM_BASE 0x20000000U /*!< SRAM base address in the alias region */
#define PERIPH_BASE 0x40000000U /*!< Peripheral base address in the alias region */ #define PERIPH_BASE 0x40000000U /*!< Peripheral base address in the alias region */
@ -627,11 +632,15 @@ typedef struct
#define TIM2_BASE (APB1PERIPH_BASE + 0x00000000U) #define TIM2_BASE (APB1PERIPH_BASE + 0x00000000U)
#define TIM3_BASE (APB1PERIPH_BASE + 0x00000400U) #define TIM3_BASE (APB1PERIPH_BASE + 0x00000400U)
#define TIM4_BASE (APB1PERIPH_BASE + 0x00000800U)
#define RTC_BASE (APB1PERIPH_BASE + 0x00002800U) #define RTC_BASE (APB1PERIPH_BASE + 0x00002800U)
#define WWDG_BASE (APB1PERIPH_BASE + 0x00002C00U) #define WWDG_BASE (APB1PERIPH_BASE + 0x00002C00U)
#define IWDG_BASE (APB1PERIPH_BASE + 0x00003000U) #define IWDG_BASE (APB1PERIPH_BASE + 0x00003000U)
#define SPI2_BASE (APB1PERIPH_BASE + 0x00003800U)
#define USART2_BASE (APB1PERIPH_BASE + 0x00004400U) #define USART2_BASE (APB1PERIPH_BASE + 0x00004400U)
#define USART3_BASE (APB1PERIPH_BASE + 0x00004800U)
#define I2C1_BASE (APB1PERIPH_BASE + 0x00005400U) #define I2C1_BASE (APB1PERIPH_BASE + 0x00005400U)
#define I2C2_BASE (APB1PERIPH_BASE + 0x5800)
#define CAN1_BASE (APB1PERIPH_BASE + 0x00006400U) #define CAN1_BASE (APB1PERIPH_BASE + 0x00006400U)
#define BKP_BASE (APB1PERIPH_BASE + 0x00006C00U) #define BKP_BASE (APB1PERIPH_BASE + 0x00006C00U)
#define PWR_BASE (APB1PERIPH_BASE + 0x00007000U) #define PWR_BASE (APB1PERIPH_BASE + 0x00007000U)
@ -641,6 +650,7 @@ typedef struct
#define GPIOB_BASE (APB2PERIPH_BASE + 0x00000C00U) #define GPIOB_BASE (APB2PERIPH_BASE + 0x00000C00U)
#define GPIOC_BASE (APB2PERIPH_BASE + 0x00001000U) #define GPIOC_BASE (APB2PERIPH_BASE + 0x00001000U)
#define GPIOD_BASE (APB2PERIPH_BASE + 0x00001400U) #define GPIOD_BASE (APB2PERIPH_BASE + 0x00001400U)
#define GPIOE_BASE (APB2PERIPH_BASE + 0x00001800U)
#define ADC1_BASE (APB2PERIPH_BASE + 0x00002400U) #define ADC1_BASE (APB2PERIPH_BASE + 0x00002400U)
#define ADC2_BASE (APB2PERIPH_BASE + 0x00002800U) #define ADC2_BASE (APB2PERIPH_BASE + 0x00002800U)
#define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00U) #define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00U)
@ -684,11 +694,15 @@ typedef struct
#define TIM2 ((TIM_TypeDef *)TIM2_BASE) #define TIM2 ((TIM_TypeDef *)TIM2_BASE)
#define TIM3 ((TIM_TypeDef *)TIM3_BASE) #define TIM3 ((TIM_TypeDef *)TIM3_BASE)
#define TIM4 ((TIM_TypeDef *)TIM4_BASE)
#define RTC ((RTC_TypeDef *)RTC_BASE) #define RTC ((RTC_TypeDef *)RTC_BASE)
#define WWDG ((WWDG_TypeDef *)WWDG_BASE) #define WWDG ((WWDG_TypeDef *)WWDG_BASE)
#define IWDG ((IWDG_TypeDef *)IWDG_BASE) #define IWDG ((IWDG_TypeDef *)IWDG_BASE)
#define SPI2 ((SPI_TypeDef *)SPI2_BASE)
#define USART2 ((USART_TypeDef *)USART2_BASE) #define USART2 ((USART_TypeDef *)USART2_BASE)
#define USART3 ((USART_TypeDef *)USART3_BASE)
#define I2C1 ((I2C_TypeDef *)I2C1_BASE) #define I2C1 ((I2C_TypeDef *)I2C1_BASE)
#define I2C2 ((I2C_TypeDef *)I2C2_BASE)
#define USB ((USB_TypeDef *)USB_BASE) #define USB ((USB_TypeDef *)USB_BASE)
#define CAN1 ((CAN_TypeDef *)CAN1_BASE) #define CAN1 ((CAN_TypeDef *)CAN1_BASE)
#define BKP ((BKP_TypeDef *)BKP_BASE) #define BKP ((BKP_TypeDef *)BKP_BASE)
@ -699,6 +713,7 @@ typedef struct
#define GPIOB ((GPIO_TypeDef *)GPIOB_BASE) #define GPIOB ((GPIO_TypeDef *)GPIOB_BASE)
#define GPIOC ((GPIO_TypeDef *)GPIOC_BASE) #define GPIOC ((GPIO_TypeDef *)GPIOC_BASE)
#define GPIOD ((GPIO_TypeDef *)GPIOD_BASE) #define GPIOD ((GPIO_TypeDef *)GPIOD_BASE)
#define GPIOE ((GPIO_TypeDef *)GPIOE_BASE)
#define ADC1 ((ADC_TypeDef *)ADC1_BASE) #define ADC1 ((ADC_TypeDef *)ADC1_BASE)
#define ADC2 ((ADC_TypeDef *)ADC2_BASE) #define ADC2 ((ADC_TypeDef *)ADC2_BASE)
#define ADC12_COMMON ((ADC_Common_TypeDef *)ADC1_BASE) #define ADC12_COMMON ((ADC_Common_TypeDef *)ADC1_BASE)
@ -1226,6 +1241,9 @@ typedef struct
#define RCC_APB2RSTR_USART1RST RCC_APB2RSTR_USART1RST_Msk /*!< USART1 reset */ #define RCC_APB2RSTR_USART1RST RCC_APB2RSTR_USART1RST_Msk /*!< USART1 reset */
#define RCC_APB2RSTR_IOPERST_Pos (6U)
#define RCC_APB2RSTR_IOPERST_Msk (0x1U << RCC_APB2RSTR_IOPERST_Pos) /*!< 0x00000040 */
#define RCC_APB2RSTR_IOPERST RCC_APB2RSTR_IOPERST_Msk /*!< I/O port E reset */
@ -1258,6 +1276,18 @@ typedef struct
#define RCC_APB1RSTR_PWRRST_Msk (0x1U << RCC_APB1RSTR_PWRRST_Pos) /*!< 0x10000000 */ #define RCC_APB1RSTR_PWRRST_Msk (0x1U << RCC_APB1RSTR_PWRRST_Pos) /*!< 0x10000000 */
#define RCC_APB1RSTR_PWRRST RCC_APB1RSTR_PWRRST_Msk /*!< Power interface reset */ #define RCC_APB1RSTR_PWRRST RCC_APB1RSTR_PWRRST_Msk /*!< Power interface reset */
#define RCC_APB1RSTR_TIM4RST_Pos (2U)
#define RCC_APB1RSTR_TIM4RST_Msk (0x1U << RCC_APB1RSTR_TIM4RST_Pos) /*!< 0x00000004 */
#define RCC_APB1RSTR_TIM4RST RCC_APB1RSTR_TIM4RST_Msk /*!< Timer 4 reset */
#define RCC_APB1RSTR_SPI2RST_Pos (14U)
#define RCC_APB1RSTR_SPI2RST_Msk (0x1U << RCC_APB1RSTR_SPI2RST_Pos) /*!< 0x00004000 */
#define RCC_APB1RSTR_SPI2RST RCC_APB1RSTR_SPI2RST_Msk /*!< SPI 2 reset */
#define RCC_APB1RSTR_USART3RST_Pos (18U)
#define RCC_APB1RSTR_USART3RST_Msk (0x1U << RCC_APB1RSTR_USART3RST_Pos) /*!< 0x00040000 */
#define RCC_APB1RSTR_USART3RST RCC_APB1RSTR_USART3RST_Msk /*!< USART 3 reset */
#define RCC_APB1RSTR_I2C2RST_Pos (22U)
#define RCC_APB1RSTR_I2C2RST_Msk (0x1U << RCC_APB1RSTR_I2C2RST_Pos) /*!< 0x00400000 */
#define RCC_APB1RSTR_I2C2RST RCC_APB1RSTR_I2C2RST_Msk /*!< I2C 2 reset */
#define RCC_APB1RSTR_USBRST_Pos (23U) #define RCC_APB1RSTR_USBRST_Pos (23U)
#define RCC_APB1RSTR_USBRST_Msk (0x1U << RCC_APB1RSTR_USBRST_Pos) /*!< 0x00800000 */ #define RCC_APB1RSTR_USBRST_Msk (0x1U << RCC_APB1RSTR_USBRST_Pos) /*!< 0x00800000 */
@ -1320,6 +1350,9 @@ typedef struct
#define RCC_APB2ENR_USART1EN RCC_APB2ENR_USART1EN_Msk /*!< USART1 clock enable */ #define RCC_APB2ENR_USART1EN RCC_APB2ENR_USART1EN_Msk /*!< USART1 clock enable */
#define RCC_APB2ENR_IOPEEN_Pos (6U)
#define RCC_APB2ENR_IOPEEN_Msk (0x1U << RCC_APB2ENR_IOPEEN_Pos) /*!< 0x00000040 */
#define RCC_APB2ENR_IOPEEN RCC_APB2ENR_IOPEEN_Msk /*!< I/O port E clock enable */
@ -1352,6 +1385,18 @@ typedef struct
#define RCC_APB1ENR_PWREN_Msk (0x1U << RCC_APB1ENR_PWREN_Pos) /*!< 0x10000000 */ #define RCC_APB1ENR_PWREN_Msk (0x1U << RCC_APB1ENR_PWREN_Pos) /*!< 0x10000000 */
#define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface clock enable */ #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface clock enable */
#define RCC_APB1ENR_TIM4EN_Pos (2U)
#define RCC_APB1ENR_TIM4EN_Msk (0x1U << RCC_APB1ENR_TIM4EN_Pos) /*!< 0x00000004 */
#define RCC_APB1ENR_TIM4EN RCC_APB1ENR_TIM4EN_Msk /*!< Timer 4 clock enable */
#define RCC_APB1ENR_SPI2EN_Pos (14U)
#define RCC_APB1ENR_SPI2EN_Msk (0x1U << RCC_APB1ENR_SPI2EN_Pos) /*!< 0x00004000 */
#define RCC_APB1ENR_SPI2EN RCC_APB1ENR_SPI2EN_Msk /*!< SPI 2 clock enable */
#define RCC_APB1ENR_USART3EN_Pos (18U)
#define RCC_APB1ENR_USART3EN_Msk (0x1U << RCC_APB1ENR_USART3EN_Pos) /*!< 0x00040000 */
#define RCC_APB1ENR_USART3EN RCC_APB1ENR_USART3EN_Msk /*!< USART 3 clock enable */
#define RCC_APB1ENR_I2C2EN_Pos (22U)
#define RCC_APB1ENR_I2C2EN_Msk (0x1U << RCC_APB1ENR_I2C2EN_Pos) /*!< 0x00400000 */
#define RCC_APB1ENR_I2C2EN RCC_APB1ENR_I2C2EN_Msk /*!< I2C 2 clock enable */
#define RCC_APB1ENR_USBEN_Pos (23U) #define RCC_APB1ENR_USBEN_Pos (23U)
#define RCC_APB1ENR_USBEN_Msk (0x1U << RCC_APB1ENR_USBEN_Pos) /*!< 0x00800000 */ #define RCC_APB1ENR_USBEN_Msk (0x1U << RCC_APB1ENR_USBEN_Pos) /*!< 0x00800000 */
@ -2040,6 +2085,20 @@ typedef struct
#define AFIO_MAPR_USART2_REMAP_Msk (0x1U << AFIO_MAPR_USART2_REMAP_Pos) /*!< 0x00000008 */ #define AFIO_MAPR_USART2_REMAP_Msk (0x1U << AFIO_MAPR_USART2_REMAP_Pos) /*!< 0x00000008 */
#define AFIO_MAPR_USART2_REMAP AFIO_MAPR_USART2_REMAP_Msk /*!< USART2 remapping */ #define AFIO_MAPR_USART2_REMAP AFIO_MAPR_USART2_REMAP_Msk /*!< USART2 remapping */
#define AFIO_MAPR_USART3_REMAP_Pos (4U)
#define AFIO_MAPR_USART3_REMAP_Msk (0x3U << AFIO_MAPR_USART3_REMAP_Pos) /*!< 0x00000030 */
#define AFIO_MAPR_USART3_REMAP AFIO_MAPR_USART3_REMAP_Msk /*!< USART3_REMAP[1:0] bits (USART3 remapping) */
#define AFIO_MAPR_USART3_REMAP_0 (0x1U << AFIO_MAPR_USART3_REMAP_Pos) /*!< 0x00000010 */
#define AFIO_MAPR_USART3_REMAP_1 (0x2U << AFIO_MAPR_USART3_REMAP_Pos) /*!< 0x00000020 */
/* USART3_REMAP configuration */
#define AFIO_MAPR_USART3_REMAP_NOREMAP 0x00000000U /*!< No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14) */
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Pos (4U)
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Msk (0x1U << AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Pos) /*!< 0x00000010 */
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Msk /*!< Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14) */
#define AFIO_MAPR_USART3_REMAP_FULLREMAP_Pos (4U)
#define AFIO_MAPR_USART3_REMAP_FULLREMAP_Msk (0x3U << AFIO_MAPR_USART3_REMAP_FULLREMAP_Pos) /*!< 0x00000030 */
#define AFIO_MAPR_USART3_REMAP_FULLREMAP AFIO_MAPR_USART3_REMAP_FULLREMAP_Msk /*!< Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12) */
#define AFIO_MAPR_TIM1_REMAP_Pos (6U) #define AFIO_MAPR_TIM1_REMAP_Pos (6U)
#define AFIO_MAPR_TIM1_REMAP_Msk (0x3U << AFIO_MAPR_TIM1_REMAP_Pos) /*!< 0x000000C0 */ #define AFIO_MAPR_TIM1_REMAP_Msk (0x3U << AFIO_MAPR_TIM1_REMAP_Pos) /*!< 0x000000C0 */
@ -2089,6 +2148,9 @@ typedef struct
#define AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk (0x3U << AFIO_MAPR_TIM3_REMAP_FULLREMAP_Pos) /*!< 0x00000C00 */ #define AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk (0x3U << AFIO_MAPR_TIM3_REMAP_FULLREMAP_Pos) /*!< 0x00000C00 */
#define AFIO_MAPR_TIM3_REMAP_FULLREMAP AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */ #define AFIO_MAPR_TIM3_REMAP_FULLREMAP AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */
#define AFIO_MAPR_TIM4_REMAP_Pos (12U)
#define AFIO_MAPR_TIM4_REMAP_Msk (0x1U << AFIO_MAPR_TIM4_REMAP_Pos) /*!< 0x00001000 */
#define AFIO_MAPR_TIM4_REMAP AFIO_MAPR_TIM4_REMAP_Msk /*!< TIM4_REMAP bit (TIM4 remapping) */
#define AFIO_MAPR_CAN_REMAP_Pos (13U) #define AFIO_MAPR_CAN_REMAP_Pos (13U)
#define AFIO_MAPR_CAN_REMAP_Msk (0x3U << AFIO_MAPR_CAN_REMAP_Pos) /*!< 0x00006000 */ #define AFIO_MAPR_CAN_REMAP_Msk (0x3U << AFIO_MAPR_CAN_REMAP_Pos) /*!< 0x00006000 */
@ -10001,12 +10063,18 @@ typedef struct
#define DBGMCU_CR_DBG_TIM3_STOP_Pos (12U) #define DBGMCU_CR_DBG_TIM3_STOP_Pos (12U)
#define DBGMCU_CR_DBG_TIM3_STOP_Msk (0x1U << DBGMCU_CR_DBG_TIM3_STOP_Pos) /*!< 0x00001000 */ #define DBGMCU_CR_DBG_TIM3_STOP_Msk (0x1U << DBGMCU_CR_DBG_TIM3_STOP_Pos) /*!< 0x00001000 */
#define DBGMCU_CR_DBG_TIM3_STOP DBGMCU_CR_DBG_TIM3_STOP_Msk /*!< TIM3 counter stopped when core is halted */ #define DBGMCU_CR_DBG_TIM3_STOP DBGMCU_CR_DBG_TIM3_STOP_Msk /*!< TIM3 counter stopped when core is halted */
#define DBGMCU_CR_DBG_TIM4_STOP_Pos (13U)
#define DBGMCU_CR_DBG_TIM4_STOP_Msk (0x1U << DBGMCU_CR_DBG_TIM4_STOP_Pos) /*!< 0x00002000 */
#define DBGMCU_CR_DBG_TIM4_STOP DBGMCU_CR_DBG_TIM4_STOP_Msk /*!< TIM4 counter stopped when core is halted */
#define DBGMCU_CR_DBG_CAN1_STOP_Pos (14U) #define DBGMCU_CR_DBG_CAN1_STOP_Pos (14U)
#define DBGMCU_CR_DBG_CAN1_STOP_Msk (0x1U << DBGMCU_CR_DBG_CAN1_STOP_Pos) /*!< 0x00004000 */ #define DBGMCU_CR_DBG_CAN1_STOP_Msk (0x1U << DBGMCU_CR_DBG_CAN1_STOP_Pos) /*!< 0x00004000 */
#define DBGMCU_CR_DBG_CAN1_STOP DBGMCU_CR_DBG_CAN1_STOP_Msk /*!< Debug CAN1 stopped when Core is halted */ #define DBGMCU_CR_DBG_CAN1_STOP DBGMCU_CR_DBG_CAN1_STOP_Msk /*!< Debug CAN1 stopped when Core is halted */
#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos (15U) #define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos (15U)
#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk (0x1U << DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos) /*!< 0x00008000 */ #define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk (0x1U << DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos) /*!< 0x00008000 */
#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk /*!< SMBUS timeout mode stopped when Core is halted */ #define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk /*!< SMBUS timeout mode stopped when Core is halted */
#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Pos (16U)
#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Msk (0x1U << DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Pos) /*!< 0x00010000 */
#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Msk /*!< SMBUS timeout mode stopped when Core is halted */
/******************************************************************************/ /******************************************************************************/
/* */ /* */
@ -10179,6 +10247,30 @@ typedef struct
#define FLASH_WRP0_nWRP0_Msk (0xFFU << FLASH_WRP0_nWRP0_Pos) /*!< 0x0000FF00 */ #define FLASH_WRP0_nWRP0_Msk (0xFFU << FLASH_WRP0_nWRP0_Pos) /*!< 0x0000FF00 */
#define FLASH_WRP0_nWRP0 FLASH_WRP0_nWRP0_Msk /*!< Flash memory write protection complemented option bytes */ #define FLASH_WRP0_nWRP0 FLASH_WRP0_nWRP0_Msk /*!< Flash memory write protection complemented option bytes */
/****************** Bit definition for FLASH_WRP1 register ******************/
#define FLASH_WRP1_WRP1_Pos (16U)
#define FLASH_WRP1_WRP1_Msk (0xFFU << FLASH_WRP1_WRP1_Pos) /*!< 0x00FF0000 */
#define FLASH_WRP1_WRP1 FLASH_WRP1_WRP1_Msk /*!< Flash memory write protection option bytes */
#define FLASH_WRP1_nWRP1_Pos (24U)
#define FLASH_WRP1_nWRP1_Msk (0xFFU << FLASH_WRP1_nWRP1_Pos) /*!< 0xFF000000 */
#define FLASH_WRP1_nWRP1 FLASH_WRP1_nWRP1_Msk /*!< Flash memory write protection complemented option bytes */
/****************** Bit definition for FLASH_WRP2 register ******************/
#define FLASH_WRP2_WRP2_Pos (0U)
#define FLASH_WRP2_WRP2_Msk (0xFFU << FLASH_WRP2_WRP2_Pos) /*!< 0x000000FF */
#define FLASH_WRP2_WRP2 FLASH_WRP2_WRP2_Msk /*!< Flash memory write protection option bytes */
#define FLASH_WRP2_nWRP2_Pos (8U)
#define FLASH_WRP2_nWRP2_Msk (0xFFU << FLASH_WRP2_nWRP2_Pos) /*!< 0x0000FF00 */
#define FLASH_WRP2_nWRP2 FLASH_WRP2_nWRP2_Msk /*!< Flash memory write protection complemented option bytes */
/****************** Bit definition for FLASH_WRP3 register ******************/
#define FLASH_WRP3_WRP3_Pos (16U)
#define FLASH_WRP3_WRP3_Msk (0xFFU << FLASH_WRP3_WRP3_Pos) /*!< 0x00FF0000 */
#define FLASH_WRP3_WRP3 FLASH_WRP3_WRP3_Msk /*!< Flash memory write protection option bytes */
#define FLASH_WRP3_nWRP3_Pos (24U)
#define FLASH_WRP3_nWRP3_Msk (0xFFU << FLASH_WRP3_nWRP3_Pos) /*!< 0xFF000000 */
#define FLASH_WRP3_nWRP3 FLASH_WRP3_nWRP3_Msk /*!< Flash memory write protection complemented option bytes */
/** /**
@ -10224,7 +10316,8 @@ typedef struct
#define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \ #define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
((INSTANCE) == GPIOB) || \ ((INSTANCE) == GPIOB) || \
((INSTANCE) == GPIOC) || \ ((INSTANCE) == GPIOC) || \
((INSTANCE) == GPIOD)) ((INSTANCE) == GPIOD) || \
((INSTANCE) == GPIOE))
/**************************** GPIO Alternate Function Instances ***************/ /**************************** GPIO Alternate Function Instances ***************/
#define IS_GPIO_AF_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE) #define IS_GPIO_AF_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE)
@ -10233,7 +10326,8 @@ typedef struct
#define IS_GPIO_LOCK_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE) #define IS_GPIO_LOCK_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE)
/******************************** I2C Instances *******************************/ /******************************** I2C Instances *******************************/
#define IS_I2C_ALL_INSTANCE(INSTANCE) ((INSTANCE) == I2C1) #define IS_I2C_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2))
/******************************* SMBUS Instances ******************************/ /******************************* SMBUS Instances ******************************/
#define IS_SMBUS_ALL_INSTANCE IS_I2C_ALL_INSTANCE #define IS_SMBUS_ALL_INSTANCE IS_I2C_ALL_INSTANCE
@ -10242,86 +10336,102 @@ typedef struct
#define IS_IWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == IWDG) #define IS_IWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == IWDG)
/******************************** SPI Instances *******************************/ /******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) ((INSTANCE) == SPI1) #define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2))
/****************************** START TIM Instances ***************************/ /****************************** START TIM Instances ***************************/
/****************************** TIM Instances *********************************/ /****************************** TIM Instances *********************************/
#define IS_TIM_INSTANCE(INSTANCE)\ #define IS_TIM_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_ADVANCED_INSTANCE(INSTANCE) ((INSTANCE) == TIM1) #define IS_TIM_ADVANCED_INSTANCE(INSTANCE) ((INSTANCE) == TIM1)
#define IS_TIM_CC1_INSTANCE(INSTANCE)\ #define IS_TIM_CC1_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CC2_INSTANCE(INSTANCE)\ #define IS_TIM_CC2_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CC3_INSTANCE(INSTANCE)\ #define IS_TIM_CC3_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CC4_INSTANCE(INSTANCE)\ #define IS_TIM_CC4_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE)\ #define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)\ #define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_XOR_INSTANCE(INSTANCE)\ #define IS_TIM_XOR_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_MASTER_INSTANCE(INSTANCE)\ #define IS_TIM_MASTER_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_SLAVE_INSTANCE(INSTANCE)\ #define IS_TIM_SLAVE_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_DMABURST_INSTANCE(INSTANCE)\ #define IS_TIM_DMABURST_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_BREAK_INSTANCE(INSTANCE)\ #define IS_TIM_BREAK_INSTANCE(INSTANCE)\
((INSTANCE) == TIM1) ((INSTANCE) == TIM1)
@ -10340,6 +10450,12 @@ typedef struct
((CHANNEL) == TIM_CHANNEL_4))) \ ((CHANNEL) == TIM_CHANNEL_4))) \
|| \ || \
(((INSTANCE) == TIM3) && \ (((INSTANCE) == TIM3) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
(((INSTANCE) == TIM4) && \
(((CHANNEL) == TIM_CHANNEL_1) || \ (((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \ ((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \ ((CHANNEL) == TIM_CHANNEL_3) || \
@ -10354,7 +10470,8 @@ typedef struct
#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE)\ #define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE)\ #define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE)\
((INSTANCE) == TIM1) ((INSTANCE) == TIM1)
@ -10362,28 +10479,33 @@ typedef struct
#define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_DMA_INSTANCE(INSTANCE)\ #define IS_TIM_DMA_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_DMA_CC_INSTANCE(INSTANCE)\ #define IS_TIM_DMA_CC_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)\ #define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)\
((INSTANCE) == TIM1) ((INSTANCE) == TIM1)
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ #define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ #define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) 0U #define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) 0U
@ -10392,39 +10514,48 @@ typedef struct
/******************** USART Instances : Synchronous mode **********************/ /******************** USART Instances : Synchronous mode **********************/
#define IS_USART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_USART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2)) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/******************** UART Instances : Asynchronous mode **********************/ /******************** UART Instances : Asynchronous mode **********************/
#define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/******************** UART Instances : Half-Duplex mode **********************/ /******************** UART Instances : Half-Duplex mode **********************/
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/******************** UART Instances : LIN mode **********************/ /******************** UART Instances : LIN mode **********************/
#define IS_UART_LIN_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_LIN_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/****************** UART Instances : Hardware Flow control ********************/ /****************** UART Instances : Hardware Flow control ********************/
#define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/********************* UART Instances : Smard card mode ***********************/ /********************* UART Instances : Smard card mode ***********************/
#define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/*********************** UART Instances : IRDA mode ***************************/ /*********************** UART Instances : IRDA mode ***************************/
#define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/***************** UART Instances : Multi-Processor mode **********************/ /***************** UART Instances : Multi-Processor mode **********************/
#define IS_UART_MULTIPROCESSOR_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_MULTIPROCESSOR_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/***************** UART Instances : DMA mode available **********************/ /***************** UART Instances : DMA mode available **********************/
#define IS_UART_DMA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_DMA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2)) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/****************************** RTC Instances *********************************/ /****************************** RTC Instances *********************************/
#define IS_RTC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == RTC) #define IS_RTC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == RTC)
@ -10504,7 +10635,7 @@ typedef struct
} }
#endif /* __cplusplus */ #endif /* __cplusplus */
#endif /* __STM32F103x6_H */ #endif /* __STM32F103xB_H */

16
Inc/usb_parsing.h
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@ -0,0 +1,16 @@
/*
* usb_parsing.h
*
* The MIT License.
* Created on: 15.11.2018
* Author: Mateusz Salamon
* www.msalamon.pl
* mateusz@msalamon.pl
*/
#ifndef USB_PARSING_H_
#define USB_PARSING_H_
void USB_Parsing(void);
#endif /* USB_PARSING_H_ */

115
Inc/ws2812b_fx.h
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@ -21,10 +21,6 @@
#define DEFAULT_SPEED 150 #define DEFAULT_SPEED 150
#define SPEED_MAX 65535 #define SPEED_MAX 65535
#define BRIGHTNESS_MIN 0
#define DEFAULT_BRIGHTNESS 50
#define BRIGHTNESS_MAX 255
#define MODE_COUNT 58 #define MODE_COUNT 58
#define DEFAULT_MODE 0 #define DEFAULT_MODE 0
@ -43,6 +39,11 @@
#define ORANGE (uint32_t)0xFF3000 #define ORANGE (uint32_t)0xFF3000
#define PINK (uint32_t)0xFF1493 #define PINK (uint32_t)0xFF1493
typedef enum {
FX_OK = 0,
FX_ERROR = 1
} FX_STATUS;
typedef enum { typedef enum {
FX_MODE_STATIC, FX_MODE_STATIC,
FX_MODE_WHITE_TO_COLOR, FX_MODE_WHITE_TO_COLOR,
@ -104,93 +105,47 @@ FX_MODE_TRICOLOR_CHASE,
FX_MODE_ICU, FX_MODE_ICU,
} fx_mode; } fx_mode;
FX_STATUS WS2812BFX_Init(uint8_t Segments);
FX_STATUS WS2812BFX_SegmentIncrease(void);
FX_STATUS WS2812BFX_SegmentDecrease(void);
uint8_t WS2812BFX_GetSegmentsQuantity(void);
void WS2812BFX_SysTickCallback(void); void WS2812BFX_SysTickCallback(void);
void WS2812BFX_Callback(void); void WS2812BFX_Callback(void);
void WS2812BFX_Start(void);
void WS2812BFX_Stop(void);
void WS2812BFX_SetMode(fx_mode mode); FX_STATUS WS2812BFX_Start(uint8_t Segment);
void WS2812BFX_NextMode(void); FX_STATUS WS2812BFX_Stop(uint8_t Segment);
void WS2812BFX_PrevMode(void); FX_STATUS WS2812BFX_IsRunning(uint8_t Segment, uint8_t *Running);
FX_STATUS WS2812BFX_SetMode(uint8_t Segment, fx_mode Mode);
FX_STATUS WS2812BFX_GetMode(uint8_t Segment, fx_mode *Mode);
FX_STATUS WS2812BFX_NextMode(uint8_t Segment);
FX_STATUS WS2812BFX_PrevMode(uint8_t Segment);
FX_STATUS WS2812BFX_SetReverse(uint8_t Segment, uint8_t Reverse);
FX_STATUS WS2812BFX_GetReverse(uint8_t Segment, uint8_t *Reverse);
void WS2812BFX_SetSpeed(uint16_t Speed); FX_STATUS WS2812BFX_SetSegmentSize(uint8_t Segment, uint16_t Start, uint16_t Stop);
void WS2812BFX_IncreaseSpeed(uint16_t Speed); FX_STATUS WS2812BFX_GetSegmentSize(uint8_t Segment, uint16_t *Start, uint16_t *Stop);
void WS2812BFX_DecreaseSpeed(uint16_t Speed); FX_STATUS WS2812BFX_SegmentIncreaseEnd(uint8_t Segment);
FX_STATUS WS2812BFX_SegmentDecreaseEnd(uint8_t Segment);
FX_STATUS WS2812BFX_SegmentIncreaseStart(uint8_t Segment);
FX_STATUS WS2812BFX_SegmentDecreaseStart(uint8_t Segment);
FX_STATUS WS2812BFX_SetSpeed(uint8_t Segment, uint16_t Speed);
FX_STATUS WS2812BFX_GetSpeed(uint8_t Segment, uint16_t *Speed);
FX_STATUS WS2812BFX_IncreaseSpeed(uint8_t Segment, uint16_t Speed);
FX_STATUS WS2812BFX_DecreaseSpeed(uint8_t Segment, uint16_t Speed);
void WS2812BFX_SetColorStruct(uint8_t id, ws2812b_color c); void WS2812BFX_SetColorStruct(uint8_t id, ws2812b_color c);
void WS2812BFX_SetColorRGB(uint8_t id, uint8_t r, uint8_t g, uint8_t b); void WS2812BFX_SetColorRGB(uint8_t id, uint8_t r, uint8_t g, uint8_t b);
FX_STATUS WS2812BFX_GetColorRGB(uint8_t id, uint8_t *r, uint8_t *g, uint8_t *b);
void WS2812BFX_SetColorHSV(uint8_t id, uint16_t h, uint8_t s, uint8_t v); void WS2812BFX_SetColorHSV(uint8_t id, uint16_t h, uint8_t s, uint8_t v);
void WS2812BFX_SetColor(uint8_t id, uint32_t c); void WS2812BFX_SetColor(uint8_t id, uint32_t c);
void WS2812BFX_SetAll(uint32_t c);
void WS2812BFX_SetAllRGB(uint8_t r, uint8_t g, uint8_t b); FX_STATUS WS2812BFX_SetAll(uint8_t Segment, uint32_t c);
FX_STATUS WS2812BFX_SetAllRGB(uint8_t Segment, uint8_t r, uint8_t g, uint8_t b);
void WS2812BFX_RGBtoHSV(uint8_t r, uint8_t g, uint8_t b, uint16_t *h, uint8_t *s, uint8_t *v); void WS2812BFX_RGBtoHSV(uint8_t r, uint8_t g, uint8_t b, uint16_t *h, uint8_t *s, uint8_t *v);
void WS2812BFX_HSVtoRGB(uint16_t h, uint8_t s, uint8_t v, uint8_t *r, uint8_t *g, uint8_t *b); void WS2812BFX_HSVtoRGB(uint16_t h, uint8_t s, uint8_t v, uint8_t *r, uint8_t *g, uint8_t *b);
/*
*
* MODES
*
* */
void
strip_off(void),
mode_static(void),
mode_white_to_color(void),
mode_black_to_color(void),
mode_blink(void),
mode_blink_rainbow(void),
mode_strobe(void),
mode_strobe_rainbow(void),
mode_breath(void),
mode_color_wipe(void),
mode_color_wipe_inv(void),
mode_color_wipe_rev(void),
mode_color_wipe_rev_inv(void),
mode_color_wipe_random(void),
mode_color_sweep_random(void),
mode_random_color(void),
mode_single_dynamic(void),
mode_multi_dynamic(void),
mode_rainbow(void),
mode_rainbow_cycle(void),
mode_fade(void),
mode_scan(void),
mode_dual_scan(void),
mode_theater_chase(void),
mode_theater_chase_rainbow(void),
mode_running_lights(void),
mode_twinkle(void),
mode_twinkle_random(void),
mode_twinkle_fade(void),
mode_twinkle_fade_random(void),
mode_sparkle(void),
mode_flash_sparkle(void),
mode_hyper_sparkle(void),
mode_multi_strobe(void),
mode_chase_white(void),
mode_chase_color(void),
mode_chase_random(void),
mode_chase_rainbow(void),
mode_chase_flash(void),
mode_chase_flash_random(void),
mode_chase_rainbow_white(void),
mode_chase_blackout(void),
mode_chase_blackout_rainbow(void),
mode_running_color(void),
mode_running_red_blue(void),
mode_running_random(void),
mode_larson_scanner(void),
mode_comet(void),
mode_fireworks(void),
mode_fireworks_random(void),
mode_merry_christmas(void),
mode_fire_flicker(void),
mode_fire_flicker_soft(void),
mode_fire_flicker_intense(void),
mode_circus_combustus(void),
mode_halloween(void),
mode_bicolor_chase(void),
mode_tricolor_chase(void),
mode_icu(void)
;
#endif /* WS2812B_FX_H_ */ #endif /* WS2812B_FX_H_ */

10
STM32F103C6Tx_FLASH.ld → STM32F103C8Tx_FLASH.ld
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@ -4,8 +4,8 @@
** File : LinkerScript.ld ** File : LinkerScript.ld
** **
** Abstract : Linker script for STM32F103C6Tx Device with ** Abstract : Linker script for STM32F103C8Tx Device with
** 32KByte FLASH, 10KByte RAM ** 64KByte FLASH, 20KByte RAM
** **
** Set heap size, stack size and stack location according ** Set heap size, stack size and stack location according
** to application requirements. ** to application requirements.
@ -33,7 +33,7 @@
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* Highest address of the user mode stack */ /* Highest address of the user mode stack */
_estack = 0x20002800; /* end of RAM */ _estack = 0x20005000; /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */ /* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200; /* required amount of heap */ _Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */ _Min_Stack_Size = 0x400; /* required amount of stack */
@ -41,8 +41,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
/* Specify the memory areas */ /* Specify the memory areas */
MEMORY MEMORY
{ {
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 10K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K
} }
/* Define output sections */ /* Define output sections */

73
Src/main.c
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@ -55,22 +55,16 @@
#include "gpio.h" #include "gpio.h"
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
#include <stdlib.h>
#include "ws2812b.h" #include "ws2812b.h"
#include "ws2812b_fx.h" #include "ws2812b_fx.h"
#include "usbd_cdc_if.h" #include "usb_parsing.h"
#define MODE_DELAY 15000
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */ /* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/
uint8_t USBDataTX[40]; // Array for transmission USB messages
uint8_t USBDataLength; // USB message length
volatile uint16_t ModeTimer;
uint8_t Mode;
/* USER CODE END PV */ /* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
@ -82,7 +76,7 @@ void SystemClock_Config(void);
/* USER CODE END PFP */ /* USER CODE END PFP */
/* USER CODE BEGIN 0 */ /* USER CODE BEGIN 0 */
void USB_Parsing(void);
/* USER CODE END 0 */ /* USER CODE END 0 */
/** /**
@ -119,48 +113,44 @@ int main(void)
MX_USB_DEVICE_Init(); MX_USB_DEVICE_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
WS2812B_Init(&hspi1); WS2812B_Init(&hspi1);
WS2812BFX_SetSpeed(150);
WS2812BFX_SetColorRGB(0, 0,0,0);
WS2812BFX_SetColorRGB(1, 64,0,0);
WS2812BFX_SetColorRGB(2, 0,0,64);
Mode = 0; WS2812BFX_Init(3); // Start 3 segments
WS2812BFX_SetMode(Mode);
WS2812BFX_Start(); WS2812BFX_SetSpeed(0, 5000); // Speed of segment 0
WS2812BFX_SetColorRGB(0, 0, 64,0); WS2812BFX_SetSpeed(1, 2000); // Speed of segment 1
WS2812BFX_SetSpeed(2, 500); // Speed of segment 2
WS2812BFX_SetColorRGB(0, 32,0,64); // Set color 0
WS2812BFX_SetColorRGB(1, 32,0,0); // Set color 1
WS2812BFX_SetColorRGB(2, 0,64,0); // Set color 2
WS2812BFX_SetMode(0, FX_MODE_WHITE_TO_COLOR); // Set mode segment 0
WS2812BFX_SetColorRGB(0, 16,64,0);
WS2812BFX_SetColorRGB(1, 0,32,64);
WS2812BFX_SetColorRGB(2, 64,0,0);
WS2812BFX_SetMode(1, FX_MODE_BLACK_TO_COLOR); // Set mode segment 1
WS2812BFX_SetColorRGB(0, 16,64,0);
WS2812BFX_SetColorRGB(1, 0,32,64);
WS2812BFX_SetColorRGB(2, 64,0,0);
WS2812BFX_SetMode(2, FX_MODE_COLOR_WIPE); // Set mode segment 2
WS2812BFX_Start(0); // Start segment 0
WS2812BFX_Start(1); // Start segment 1
WS2812BFX_Start(2); // Start segment 2
HAL_Delay(200);
ModeTimer = MODE_DELAY;
/* USER CODE END 2 */ /* USER CODE END 2 */
/* Infinite loop */ /* Infinite loop */
/* USER CODE BEGIN WHILE */ /* USER CODE BEGIN WHILE */
while (1) while (1)
{ {
WS2812BFX_Callback(); // FX effects calllback
USB_Parsing(); // USB communication parsing
/* USER CODE END WHILE */ /* USER CODE END WHILE */
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
WS2812BFX_Callback();
if(!ModeTimer)
{
for(uint8_t i = 0; i < WS2812B_LEDS; i++)
WS2812B_SetDiodeColor(i, 0);
WS2812B_Refresh();
USBDataLength = sprintf((char*)USBDataTX, "Mode number: %d\n\r", Mode);
CDC_Transmit_FS(USBDataTX, USBDataLength);
if(Mode == 1 || Mode == 2)
WS2812BFX_SetSpeed(3000);
else
WS2812BFX_SetSpeed(200);
WS2812BFX_SetMode(Mode);
if(Mode < MODE_COUNT - 1) Mode++;
else Mode = 0;
ModeTimer = MODE_DELAY;
}
} }
/* USER CODE END 3 */ /* USER CODE END 3 */
@ -228,8 +218,7 @@ void SystemClock_Config(void)
/* USER CODE BEGIN 4 */ /* USER CODE BEGIN 4 */
void HAL_SYSTICK_Callback(void) void HAL_SYSTICK_Callback(void)
{ {
WS2812BFX_SysTickCallback(); WS2812BFX_SysTickCallback(); // FX effects software timers
if(ModeTimer) ModeTimer--;
} }
/* USER CODE END 4 */ /* USER CODE END 4 */

313
Src/usb_parsing.c
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@ -0,0 +1,313 @@
/*
* usb_parsing.c
*
* The MIT License.
* Created on: 15.11.2018
* Author: Mateusz Salamon
* www.msalamon.pl
* mateusz@msalamon.pl
*/
#include "stm32f1xx_hal.h"
#include "usbd_cdc_if.h"
#include <stdlib.h>
#include <string.h>
#include "ws2812b.h"
#include "ws2812b_fx.h"
#include "usb_parsing.h"
uint8_t USBDataRX[40]; // Array for receive USB messages
uint8_t USBReceivedDataFlag; // Received USB data flag
uint8_t USBDataTX[40]; // Array for transmission USB messages
uint8_t USBDataLength; // USB message length
void UnknownCommand(void)
{
USBDataLength = sprintf((char*)USBDataTX, "Unknown command\n\r");
}
void ColorControl(void)
{
char *buf;
int16_t Seg;
uint8_t Color[3];
if((buf = strtok((char*)USBDataRX+1, ","))) // Segment number
{
Seg = atoi(buf);
for(uint8_t i = 0; i < 3; i++)
{
if((buf = strtok(NULL, ","))) // Speed
{
Color[i] = atoi(buf);
}
else
{
USBDataLength = sprintf((char*)USBDataTX, "Color command error\n\r");
return;
}
}
WS2812BFX_SetColorRGB(Seg, Color[0], Color[1], Color[2]);
USBDataLength = sprintf((char*)USBDataTX, "ColorID:%d Value:%dR, %dG, %dB\n\r", Seg, Color[0], Color[1], Color[2]);
return;
}
USBDataLength = sprintf((char*)USBDataTX, "Color command error\n\r");
}
void SpeedControl(void)
{
char *buf;
int16_t Seg;
uint16_t Speed;
if((buf = strtok((char*)USBDataRX+1, ","))) // Segment number
{
Seg = atoi(buf);
if((buf = strtok(NULL, ","))) // Speed
{
if((Speed = atoi(buf)) > 0)
{
WS2812BFX_SetSpeed(Seg, Speed);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d Speed:%d\n\r", Seg, Speed);
return;
}
}
}
USBDataLength = sprintf((char*)USBDataTX, "Speed command error\n\r");
}
void ModeControl(void)
{
char *buf;
int16_t Seg;
int16_t Mode;
buf = strtok((char*)USBDataRX+1, ","); // Segment number
Seg = atoi(buf);
if((buf = strtok(NULL, ",")))
{
if(buf[0] == 'S')
{
WS2812BFX_Start(Seg);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d Start\n\r", Seg);
return;
}
else if(buf[0] == 'T')
{
WS2812BFX_Stop(Seg);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d Stop\n\r", Seg);
return;
}
else // Mode
{
if((Mode = atoi(buf)) > 0)
{
WS2812BFX_SetMode(Seg, Mode);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d Mode:%d\n\r", Seg, Mode);
return;
}
}
}
USBDataLength = sprintf((char*)USBDataTX, "mode command error\n\r");
}
void SegmentsControl(void)
{
int16_t Seg;
uint8_t mode_tmp;
if(USBDataRX[1] == '-')
{
WS2812BFX_SegmentDecrease();
}
else if(USBDataRX[1] == '+')
{
WS2812BFX_SegmentIncrease();
WS2812BFX_SetMode(WS2812BFX_GetSegmentsQuantity() - 1, rand()%MODE_COUNT);
WS2812BFX_Start(WS2812BFX_GetSegmentsQuantity() - 1);
}
else if((Seg = atoi((char*)(USBDataRX+1))) > 0)
{
WS2812BFX_Init(Seg);
}
else
{
USBDataLength = sprintf((char*)USBDataTX, "Segment command error\n\r");
return;
}
WS2812BFX_GetMode(WS2812BFX_GetSegmentsQuantity()-1, &mode_tmp);
USBDataLength = sprintf((char*)USBDataTX, "Segments:%d Last mode:%d\n\r", WS2812BFX_GetSegmentsQuantity(), mode_tmp);
}
void SegmentRangeControl(void)
{
char *buf;
int16_t Seg;
int16_t Start;
int16_t End;
buf = strtok((char*)USBDataRX+1, ","); // Segment number
Seg = atoi(buf);
if((buf = strtok(NULL, ",")))
{
if(buf[0] == 'R') // Range (Stanrt and Stop)
{
if((buf = strtok(NULL, ","))) // Speed
{
if((Start = atoi(buf)) > 0)
{
if((buf = strtok(NULL, ","))) // Speed
{
if((End = atoi(buf)) > 0)
{
WS2812BFX_SetSegmentSize(Seg, Start, End);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d Range:%d - %d\n\r", Seg, Start, End);
return;
}
else
USBDataLength = sprintf((char*)USBDataTX, "Segment range End error\n\r");
return;
}
}
else
USBDataLength = sprintf((char*)USBDataTX, "Segment range Start error\n\r");
return;
}
}
else if(buf[0] == 'S') //Start
{
if(buf[1] == '+')
{
WS2812BFX_SegmentIncreaseStart(Seg);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d Start increase\n\r", Seg);
return;
}
if(buf[1] == '-')
{
WS2812BFX_SegmentDecreaseStart(Seg);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d Start decrease\n\r", Seg);
return;
}
}
else if(buf[0] == 'E') //END
{
if(buf[1] == '+')
{
WS2812BFX_SegmentIncreaseEnd(Seg);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d End increase\n\r", Seg);
return;
}
if(buf[1] == '-')
{
WS2812BFX_SegmentDecreaseEnd(Seg);
USBDataLength = sprintf((char*)USBDataTX, "Segment:%d End decrease\n\r", Seg);
return;
}
}
}
USBDataLength = sprintf((char*)USBDataTX, "Segment range command error\n\r");
}
void PrintHelp(void)
{
USBDataLength = sprintf((char*)USBDataTX, "\033[2J\033[0;0H");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "==============HELP=============\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "Change Segments quantity:\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Sx' Set x segments(1 - LEDs/2)\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'S+' add one segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'S-' remove one segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "Change Segments length:\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Rx,S+' Increase start point x ");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Rx,S-' Decrease start point x ");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Rx,E+' Increase end point x ");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Rx,E-' Decrease end point x ");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Rx,R,y,z' Set start(y) and stop(z) po");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "int x segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "Change segment's mode:\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Mx,S' Start segment x\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Mx,T' Stop segment x\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Mx,y' Set y mode for x segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "Change segment's speed:\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Vx,y' Set y speed for x segment\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "Set color:\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, " 'Cx,r,g,b' x - ColorID, rgb values\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
USBDataLength = sprintf((char*)USBDataTX, "===============================\n\r");
while(USBD_BUSY == CDC_Transmit_FS(USBDataTX, USBDataLength));
}
void USB_Parsing(void)
{
if(USBReceivedDataFlag == 1)
{
USBReceivedDataFlag = 0;
switch (USBDataRX[0])
{
case 'C':
ColorControl();
break;
case 'V':
SpeedControl();
break;
case 'M':
ModeControl();
break;
case 'S':
SegmentsControl();
break;
case 'R':
SegmentRangeControl();
break;
case 'H':
PrintHelp();
break;
default:
UnknownCommand();
break;
}
CDC_Transmit_FS(USBDataTX, USBDataLength); // Send confirmation message
}
}

16
Src/usbd_cdc_if.c
Unescape View File

@ -93,8 +93,8 @@
/* USER CODE BEGIN PRIVATE_DEFINES */ /* USER CODE BEGIN PRIVATE_DEFINES */
/* Define size for the receive and transmit buffer over CDC */ /* Define size for the receive and transmit buffer over CDC */
/* It's up to user to redefine and/or remove those define */ /* It's up to user to redefine and/or remove those define */
#define APP_RX_DATA_SIZE 1000 #define APP_RX_DATA_SIZE 40
#define APP_TX_DATA_SIZE 1000 #define APP_TX_DATA_SIZE 40
/* USER CODE END PRIVATE_DEFINES */ /* USER CODE END PRIVATE_DEFINES */
/** /**
@ -293,6 +293,18 @@ static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
USBD_CDC_ReceivePacket(&hUsbDeviceFS); USBD_CDC_ReceivePacket(&hUsbDeviceFS);
extern uint8_t USBDataRX[40]; // Array for receive USB messages
extern uint8_t USBReceivedDataFlag; // Received USB data flag
for(uint8_t i = 0; i < 40; i++)
{
USBDataRX[i] = 0; // Clear the RX buffer
}
strlcpy(USBDataRX, Buf, (*Len) + 1); // Copy data to receive buffer
USBReceivedDataFlag = 1; // Set the receive flag
return (USBD_OK); return (USBD_OK);
/* USER CODE END 6 */ /* USER CODE END 6 */
} }

1250
Src/ws2812b_fx.c
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File diff suppressed because it is too large Load Diff

34
startup/startup_stm32f103x6.s → startup/startup_stm32f103xb.s
Unescape View File

@ -1,10 +1,10 @@
/** /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103x6.s * @file startup_stm32f103xb.s
* @author MCD Application Team * @author MCD Application Team
* @version V4.2.0 * @version V4.2.0
* @date 31-March-2017 * @date 31-March-2017
* @brief STM32F103x6 Devices vector table for Atollic toolchain. * @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs: * This module performs:
* - Set the initial SP * - Set the initial SP
* - Set the initial PC == Reset_Handler, * - Set the initial PC == Reset_Handler,
@ -188,16 +188,16 @@ g_pfnVectors:
.word TIM1_CC_IRQHandler .word TIM1_CC_IRQHandler
.word TIM2_IRQHandler .word TIM2_IRQHandler
.word TIM3_IRQHandler .word TIM3_IRQHandler
.word 0 .word TIM4_IRQHandler
.word I2C1_EV_IRQHandler .word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler .word I2C1_ER_IRQHandler
.word 0 .word I2C2_EV_IRQHandler
.word 0 .word I2C2_ER_IRQHandler
.word SPI1_IRQHandler .word SPI1_IRQHandler
.word 0 .word SPI2_IRQHandler
.word USART1_IRQHandler .word USART1_IRQHandler
.word USART2_IRQHandler .word USART2_IRQHandler
.word 0 .word USART3_IRQHandler
.word EXTI15_10_IRQHandler .word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler .word RTC_Alarm_IRQHandler
.word USBWakeUp_IRQHandler .word USBWakeUp_IRQHandler
@ -208,8 +208,8 @@ g_pfnVectors:
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for .word BootRAM /* @0x108. This is for boot in RAM mode for
STM32F10x Low Density devices.*/ STM32F10x Medium Density devices. */
/******************************************************************************* /*******************************************************************************
* *
@ -336,21 +336,36 @@ g_pfnVectors:
.weak TIM3_IRQHandler .weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler .thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler .weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler .thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler .weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler .thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler .weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler .thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler .weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler .thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler .weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler .thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler .weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler .thumb_set EXTI15_10_IRQHandler,Default_Handler
@ -361,3 +376,4 @@ g_pfnVectors:
.thumb_set USBWakeUp_IRQHandler,Default_Handler .thumb_set USBWakeUp_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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